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PE4259
Product Specification
Figure 3. Pin Configuration (Top View)
Table 4. Absolute Maximum Ratings
Symbol
V DD
V I
T ST
T OP
Parameter/Conditions
Power supply voltage
Voltage on any DC input
Storage temperature
range
Operating temperature
range
Min
-0.3
-0.3
-65
-40
Max
4.0
V DD +
0.3
150
85
Units
V
V
°C
°C
P IN
Input power (50 ? )
+34
1
dBm
Table 2. Pin Descriptions
ESD Voltage (HBM,
ML_STD 883 Method
2000
V
RF1
100
V
RFC
Pin
No.
1
2
3
4
5
Pin
Name
1
GND
RF2 1
CTRL
1
Description
RF Port1
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
RF Port2
Switch control input, CMOS logic level.
RF Common
This pin supports two interface options:
Single-pin control mode . A nominal 3-volt
V ESD 3015.7)
ESD Voltage (MM,
JEDEC, JESD22-A114-B)
Note 1: To maintain optimum device performance, do not exceed Max P IN at
desired operating frequency (see Figure 4 ).
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted to
the limits in the Operating Ranges table. Operation
between operating range maximum and absolute
maximum for extended periods may reduce reliability.
Figure 4. Maximum Input Power
supply connection is required.
6
CTRL or
V DD
Complementary-pin control mode . A
complementary CMOS control signal to
CTRL is supplied to this pin. Bypassing
on this pin is not required in this mode.
Note 1: All RF pins must be DC blocked with an external series capacitor or
held at o VDC
Table 3. Operating Ranges
Parameter
V DD Power Supply
Voltage
I DD Power Supply Current
(V DD = 3V, V CNTL = 3V)
Control Voltage High
Control Voltage Low
Min
1.8
0.7x V DD
Typ
3.0
9
Max
3.3
20
0.3x V DD
Units
V
μA
V
V
Latch-Up Avoidance
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the PE4259 in
the SC70 package is MSL1.
Switching Frequency
The PE4259 has a maximum 25 kHz switching rate.
Document No. 70-0134-10 │ www.psemi.com
Unlike conventional CMOS devices, UltraCMOS?
devices are immune to latch-up.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS? device, observe the
same precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
specified rating.
?2005-2012 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 11
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
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